Date of Award

Spring 1994

Document Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical & Computer Engineering

Program/Concentration

Electrical Engineering

Committee Director

John W. Stoughton

Committee Member

Roland R. Mielke

Committee Member

James F. Leathrum

Call Number for Print

Special Collections LD4331.E55S26

Abstract

A dynamic task scheduling strategy for the distributed processing of large grain dataflow algorithms using embedded firmware on an ATAMM testbed consisting of interconnected microcontrollers is presented in this thesis. The ODU/NASA developed Algorithm to Architecture Mapping Model, ATAMM, uses marked graph models to specify data and control flow for the execution of iterative, deterministic large grain dataflow algorithms in a multicomputing environment. The testbed consists of a bank of four 68HC11 microcontrollers that communicate over a token bus. The token bus arbitration scheme used is contention free and well suited for real-time computing applications. The execution of data flow graphs is simulated on the testbed to evaluate the design approach and experimental results that demonstrate the deterministic execution behavior of the data flow graphs in the presence of low communication overhead are reported. The projected approach may be extended to serve as a model for specifying the control structure for the ATAMM Multicomputer Operating System in hardware specific applications.

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DOI

10.25777/pv0x-4c58

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