Date of Award

Summer 1988

Document Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical & Computer Engineering

Program/Concentration

Electrical Engineering

Committee Director

John W. Stoughton

Committee Member

Roland R. Mielke

Committee Member

David L. Livingston

Call Number for Print

Special Collections LD4331.E55T95

Abstract

The Algorithm To Architecture Mapping Model, or ATAMM, is a graph theoretic design methodology that has been created to resolve design and performance issues involved with concurrent processing. Petri-net marked graphs are used to represent the computational environment.

This thesis describes the development of a multicomputer system which will operate within the bounds specified by the ATAMM model. The system is first designed and implemented using the framework of standard multicomputer design theory. A validation is then performed by the comparison of the system's computational performance to results predicted by ATAMM. This validation is shown to be successful for three algorithm graphs that represent different possible data flow structures.

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DOI

10.25777/qxq7-n134

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