Date of Award

Spring 5-1995

Document Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical & Computer Engineering

Program/Concentration

Electrical Engineering

Committee Director

James F. Leathrum, Jr.

Committee Member

Roland R. Mielke

Committee Member

John W. Stoughton

Call Number for Print

Special Collections LD4331.E55 V37

Abstract

The objective of this thesis is to analyze schedules of communication resources to obtain deterministic and contention-free communication in the Algorithm To Architecture Mapping Model (ATAMM). In ATAMM, performance must be deterministic to guarantee meeting deadlines. It is difficult to achieve deterministic performance in the presence of contention during communication. This thesis develops new data-flow models to study and analyze different schedules of communication resources to achieve deterministic and contention-free communication. These models are the Synchronous Communication Marked Graph (SCMG) and the Asynchronous Communication Marked Graph (ACMG). The SCMG is based on message passing synchronous communication. It defines schedules for synchronous communication resources to define serial communication and then to define synchronous communication between functional units for the given AMG. It also defines processing of the AMG node. The ACMG is based on the asynchronous message passing communication. It also defines the same objects but for asynchronous communication. The models are implemented in the AT AMM tools to satisfy AT AMM conditions for hard real-time systems.

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DOI

10.25777/2sqp-k364

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