International Journal of Computers and Their Applications
Parallel counters have been studied for several decades as a component in high speed multipliers and multi-operand adder circuits. Using a generator polynomial as a formalism for describing parallel counters in the general case, parallel counter properties can be derived and inferred. Furthermore, the structure and decomposition of the generator polynomial can suggest different implementation strategies. These include simple implementations of (7,3) and (15,4) parallel counters. By grouping factors, the design of a fast (7,3) parallel counter is presented. Finally, the generator polynomial is extended to permit factors of different weights. This extension provides a means for describing the design of the (5,5,4) and (4,5,5,5) multicolumn parallel counters.
Original Publication Citation
Belfore, L. A., II. (2014). Generator polynomial formulation for parallel counters with applications. International Journal of Computers and Their Applications, 21(1), 4-13.
Belfore, Lee A. II, "Generator Polynomial Formulation for Parallel Counters with Applications" (2014). Electrical & Computer Engineering Faculty Publications. 184.