Document Type

Report

Publication Date

2022

Pages

7 pp.

Abstract

This project is a multi-disciplinary endeavour between Physics, Electrical Engineering, and Computer Engineering. The purpose is to develop and implement an FPGA(*) based Machine Learning algorithm for real-time particle identification, filtering, and data reduction. This is important research that can be applied to streaming readout systems being developed now at JLab and other facilities. Real-time data processing is a frontier field in experimental physics, especially in HEP. The application of FPGAs at the trigger level is used by many current and planned experiments (CMS, LHCb, Belle2, PANDA). Usually they use conventional processing algorithms. LHCb has implemented ML elements for real-time data processing with a triggered readout system that runs most of the ML algorithms on a computer farm and is using the Allen system which does much of the work on GPUs. The project described in this proposal aims to test the ML-FPGA algorithms for streaming data acquisition. There are many experiments working in this area and they have a lot in common, but there are many specific solutions for detector and accelerator parameters that are worth exploring further. We propose evaluating the ML-FPGA application for a full streaming readout and the first target is EIC experiment. The first goal is particle identification (e, π, µ) using multiple detectors (CAL, GEMTRD, GEM Trackers) in real time using neural networks on FPGA. The results of this project would be useful for other experiments worldwide, especially in nuclear physics, such as EIC, SoLID, PANDA (FAIR), etc.

Rights

© 2022 The Authors.

Included with the kind written permission of the authors.

Original Publication Citation

Barbosa, F., Belfore, L., Dickover, C., Fanelli, C., Furletov, S., Furletova, Y., Jokhovets, L., Lawrence, D., & Romanova, D. (2022). Particle identification and tracking in real time using machine learning on FPGA. Thomas Jefferson National Accelerator Facility. https://www.jlab.org/sites/default/files/eic_rd_prgm/files/2022_Proposals/ML_FPGA_R_D_FY23proposal_v2_EICGENRandD2022_15.pdf

ORCID

0000-0001-6239-658X (Belfore)

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