Date of Award

Winter 1985

Document Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical/Computer Engineering

Program/Concentration

Electrical Engineering

Committee Director

Sharad V. Kanetkar

Abstract

A new technique for reducing the complexity of designing Totally Self-Checking (TSC) checkers for m-out-of-n codes is presented. The method is based on the partitioning of the input variables into r classes, then partitioning the code groups generated into Z output partitions. Comparison with earlier results reveals improvements in design simplicity and logic and testing complexity.

This thesis also presents a new method of TSC checker design where a j-level m1/n1 code and a k-level m2/n2 code TSC checker are directly summed to form a max [j,k]-level (m1 + m2) / (n1 + n2) TSC checker. A library of m/n code TSC checkers can then be used as building blocks for other m/n code TSC checkers.

DOI

10.25777/49ep-c171

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