Date of Award

Spring 2018

Document Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical & Computer Engineering

Committee Director

Lee A. Belfore, II

Committee Member

Chunsheng Xin

Committee Member

Chung Hao Chen

Abstract

This thesis presents the experimental results of a four-phase IDPAL eight-input exclusive-OR gate. The following problems with IDPAL are addressed: multistage circuits malfunctioning, simulation convergence anomalies, and inferring input information through the power clock current. EPAD MOSFETs, which provide a low threshold voltage, are shown to be unsuccessful in correcting the malfunctioning behavior of multilayer circuits. A solution to multilayer IDPAL circuits malfunctioning, called IDPAL with discharge, is shown. The differences between simulation waveforms produced by LTspice and the experimental circuits recorded by a Tektronix’s Oscilloscope are investigated. IDPAL is implemented and analyzed using ALD MOSFETs for the following adiabatic families: 2N-2P, IDPAL, and IDPAL with discharge.

Rights

In Copyright. URI: http://rightsstatements.org/vocab/InC/1.0/ This Item is protected by copyright and/or related rights. You are free to use this Item in any way that is permitted by the copyright and related rights legislation that applies to your use. For other uses you need to obtain permission from the rights-holder(s).

DOI

10.25777/qtk0-5e78

ISBN

9780438022140

Download

Share

COinS