Date of Award
Fall 2004
Document Type
Thesis
Degree Name
Master of Science (MS)
Department
Electrical & Computer Engineering
Program/Concentration
Electrical Engineering
Committee Director
James F. Leathrum, Jr.
Committee Member
Lee A. Belfore II
Committee Member
Vijayan Asari
Call Number for Print
Special Collections LD4331.E55 F65 2004
Abstract
Vector calculations are very prevalent today. Though the vector-processing computer is quite an old concept, superscalar processors lack hardware support for vector operations. This thesis investigates whether an ordinary superscalar computer architecture can be designed to include hardware support for improved vector operations without drastically changing the existing superscalar design and behavior. A computer architecture design was created and implemented that included the vector multiply (dot product) operation. The design includes a Vector Operations Unit that captures incoming vector operations and generates the necessary set of machine instructions to complete the vector operation internally. It then delivers these instructions to the dispatch and decode logic of the original superscalar architecture to be executed. This method of support for vector operations results in an extremely high density of instructions generated for each instruction that is fetched from memory. The results of this design show a significant speedup when tested against certain software implementations of the vector multiply algorithm.
Rights
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DOI
10.25777/ehwv-xg02
Recommended Citation
Flinn, Nathan D..
"Vector Operations in Superscalar Architectures"
(2004). Master of Science (MS), Thesis, Electrical & Computer Engineering, Old Dominion University, DOI: 10.25777/ehwv-xg02
https://digitalcommons.odu.edu/ece_etds/338
Included in
Algebra Commons, Computer and Systems Architecture Commons, Engineering Physics Commons, Theory and Algorithms Commons